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Scicos to SynDEx gateway

Context

The Scicos/SynDEx gateway was developped during the ECLIPSE RNTL project (2003-2005) by Cyril Faure in the AOSTE INRIA team.

Objectives

The Scicos and SynDEx softwares are based on different formalisms. Scicos is a graphical architecture-independent dynamical system modeler and simulator toolbox included in the Scicoslab engineering and scientific computation software, whereas SynDEx is a system level CAD software for prototyping and optimizing the implementation of distributed real-time embedded applications onto "multicomponent" architectures. A semantic gap between the two softwares prevents a direct transition from a Scicos model to a SynDEx one.

The Scicos/SynDEx gateway provides a way to convert a Scicos model into a SynDEx one allowing the distribution of a Scicos specified model onto a multiprocessor architecture via SynDEx. Once the model distributed, the user can automatically generate a safe and optimized real-time code able to be compiled and run on the specified architecture. The user can then compare the results obtained during the simulation with the one obtained during the real-time execution and modify the initial Scicos dynamical system if needed.

The development process

A user wishing to develop and implement a dynamical system into a target architecture must go through the following steps. The user:

  • models and simulates its dynamical system with Scicos,
  • exports a subsystem to SynDEx via the gateway,
  • models its target architecture with SynDEx,
  • launches the SynDEx Adequation heuristic which distributes and schedules the model on the target architecture,
  • launches the SynDEx automatic code generation, compiles the generated code and executes it on the real time target architecture,
  • uses results and modify the initial dynamical system with Scicos.

The figure below presents the complete development process from the Scicos modeling to the real time multiprocessor execution on the target architecture.

development process

Gateway principles

The figure below shows how the Scicos To SynDEx gateway interacts with Scicos and SynDEx.

The Scicos/SynDEx gateway

More precisely, the gateway provides the following functionalities:

Graph translation:
The Gateway generates a SynDEx model (.sdx file) corresponding to the initial Scicos model. It allows any Scicos control flow model including any amount of standard and logical blocs (if-then-else) and translates it into a conditionned data flow model of SynDEx format. Note that the model must be synchronous and therefore include one and only one activation input.
Code generation and macro code:
The Gateway automatically generates the files needed to go through the macro expansion process needed in order to obtain the target code. These files automate the linking between the SynDEx generated M4 code and the Scicos functions C code during the macro expansion process (see SynDEx documentation for details about SynDEx code generation).
Continuous time management:
Continuous Scicos blocs are also allowed, the user just has to specify the discrete and continous step then the gateway automatically implements an Euler solver in the generated code.

How to use it

The gateway allows to translate any Scicos superbloc with one activation input port (synchronous), no activation output port and any number of data input/output ports. The figure below shows some eligible superblocs.

Scicos eligible super bloc

When a superbloc has been fully specified with Scicos, the user just has to:

  1. use the button Object -> To SynDEx in the Scicos menu,
  2. click on the superbloc to translate it.

Once the translation process is over, an interface asks the user to specify some parameters.

Gateway interface

  • Absolute application path: the path where the SynDEx files will be generated
  • Application name (without suffix): the application name
  • SynDEx macro path: the path where the SynDEx macros are located (usually the path to SynDEx + "/macros")
  • Number of iterations: the number of steps the final application has to process
  • discrete step: the discrete step value (usefull when continuous blocs are present)
  • continuous step: the integration step value (usefull when continuous blocs are present)
  • Scicos C functions path: the path where the Scicos C functions are located

The .sdx and .m4 files are then generated into the user specified path and can be processed by SynDEx.

Necessary files

  • Download the gateway code that you must install in your Scilab/Scicos distribution (V4+) in order to access to the Scicos/SynDEx gateway. The installation process is described in the reference manual of the Scicos/SynDEx gateway (presently in french)
  • Download the C files compatible with Scicos and SynDEx



Last update: 2009-08-07
For any question, please contact: Yves.Sorel@inria.fr